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VLSI Engineer

HR HadarlyHerzliya, Tel Aviv District, IsraelNot specifiedFull-timeSeniority: Not specified

Posted Jun 28 · 0 applicants

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The role in plain words

Must-have
  • BSc or MSc in Electrical Engineering / Computer Engineering from a leading academic institution
  • 3–7 years of hands-on experience in VLSI / ASIC design
  • Solid experience in VLSI design (candidates with only FPGA experience will not be considered)
Nice-to-have
  • Familiarity with the RTL-to-GDSII full flow

Extracted from the job description · kept up to date automatically

Who this suits

Full job description

Original listing · kept for reference

We are Hiring: Chip Design Engineer (VLSI)

Location: Israel (Central Region)

Experience Level: Mid-level (3–7 years)

Position Type: Full-time

About the Company

We are an established, stable, and highly successful semiconductor company delivering tens of millions of chips annually to top-tier global customers in the Security, Cloud, and Computing domains.

What makes us unique? Our Israel Design Center is fully self-contained—covering everything from product definition and architecture to design, software, validation, and test. This means you get real ownership over the final silicon, a warm and collaborative culture where your impact is clearly seen, and no late-night calls across conflicting time zones.

The Role

We are looking for an experienced Chip Design Engineer to join our growing team and take a key role in RTL design, new IP development, and SoC integration. In this position, you will be deeply involved in architectural exploration, protocol evaluation, and hands-on design work across multiple chip blocks.

Key Responsibilities

• RTL design and implementation of new IPs.

• SoC integration and design ownership of complex chip subsystems.

• Exploration and evaluation of new protocols and architectural solutions.

• Close collaboration with Architecture, Verification, Validation, Software, and Back-end teams.

• Delivering high-quality, best-in-class RTL that meets performance, power, and area (PPA) goals.

Requirements

• Education: BSc or MSc in Electrical Engineering / Computer Engineering from a leading academic institution.

• Experience: 3–7 years of hands-on experience in VLSI / ASIC design.

• Must-Have: Solid experience in VLSI design (candidates with only FPGA experience will not be considered).

• Advantage: Familiarity with the RTL-to-GDSII full flow.

• Soft Skills: Strong analytical thinking, excellent communication skills, and a great team-player mindset for a multi-disciplinary environment.

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HR Hadarly
Posted Jun 28 · 0 applicants
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