Senior Power U-arch Engineer
Posted 26 days ago · 0 applicants
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The role in plain words
This role focuses on leading the micro-architecture of power features for DPU products, including power management and logical power features. The daily responsibilities involve collaborating with the DPU architecture team to define power features and analyzing workload characteristics at a system scale to drive hardware and software improvements for performance-per-watt efficiency.
- Lead a micro-architecture of power features such as: Power management, Logical Power features, etc
- Work with DPU Arch team on power features definition.
- Understand the workload characteristics for DPU workloads at System Scale to drive new HW/SW features for Perf@Watt improvements.
- BSc/MSc in EE or related fields with 10+ years of experience.
- Strong understanding of concepts of energy consumption, estimation, data movement and low power design.
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Who this suits
This role suits experienced engineers with a BSc or MSc in Electrical Engineering or related fields and over 10 years of experience in low power design and ASIC principles. It is less ideal for junior engineers or those without strong coding skills in Python and Perl.
Full job description
Original listing · kept for referenceWe are looking for a Power U-arch Senior Engineer. NVIDIA is known as a world leader in providing energy-efficient high-performance products and we continue to invest in the research and development of hyper-efficient SOC architectures. We are continually innovating in creative and unrivaled ways to improve our ability to deliver exceptional Perf/Watt solutions in a wide range of sectors and verticals. Come join NVIDIAs Applied Power team to develop state of the art DPU products.
What You'll Be Doing
• Lead a micro-architecture of power features such as: Power management, Logical Power features, etc
• Work with DPU Arch team on power features definition.
• Understand the workload characteristics for DPU workloads at System Scale to drive new HW/SW features for Perf@Watt improvements.
What We Need To See
• BSc/MSc in EE or related fields with 10+ years of experience.
• Strong understanding of concepts of energy consumption, estimation, data movement and low power design.
• Familiarity with Verilog and ASIC design principles, including knowledge of PTPX (Prime Power RTL, RTL Architect).
• Knowledge of BE flows In the field of power - a significant advantage.
• Good and interpersonal skills; much collaboration with design teams is expected.
• Strong coding/automation skills, preferably in Python and Perl.
• Desire to bring data-driven decision-making and analytics to improve our products.
NVIDIA is widely considered to be one of the technology world’s most desirable employers. Our products are leading the way with groundbreaking developments in Artificial Intelligence, High-Performance Computing and Visualization. We have some of the most forward-thinking and hardworking people in the world working for us. Do you love the challenge of crafting the fastest and most power-efficient chips in their class? If so, we want to hear from you!
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Questions about this role
- This listing did not state a salary. We only show pay when the employer publishes it.
- Lead a micro-architecture of power features such as: Power management, Logical Power features, etc, Work with DPU Arch team on power features definition., Understand the workload characteristics for DPU workloads at System Scale to drive new HW/SW features for Perf@Watt improvements., BSc/MSc in EE or related fields with 10+ years of experience., Strong understanding of concepts of energy consumption, estimation, data movement and low power design.