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FPGA Engineer

IntelPetah Tikva, Center District, IsraelNot specifiedFull-timeSeniority: Not specified

Posted yesterday · 0 applicants

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Willbi insight

The role in plain words

Must-have
  • Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or related field with relevant experience (3+ years BS / 2+ years MS)
  • Altera Quartus
  • AMD (Xilinx) Vivado
  • Familiarity with FPGA as a prototyping platform
  • Expertise in troubleshooting and solving Static Timing Analysis (STA) issues in FPGA designs
Nice-to-have
  • Familiarity with digital design fundamentals and hardware board design concepts
  • SystemVerilog
  • Synplify Premier
  • Strong problem-solving, collaboration, and communication skills

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Full job description

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Job Details

Job Description:

The Role and Impact

Join Intel's cutting-edge team as an IP Design Verification Engineer, where you'll play a pivotal role in ensuring the integrity, functionality, and reliability of logic designs that form the backbone of our innovative products. In this role, you'll directly contribute to the quality and performance of Intel's intellectual property (IP) blocks, collaborating with architects, designers, and physical design teams to verify complex architectural and microarchitectural features. Your contributions will not only shape the success of Intel's current projects but also drive advancements in the semiconductor industry, helping to power the world's technology innovations.

Key Responsibilities

Implement ASIC designs on FPGA platforms for prototyping and validation.

• Develop and maintain FPGA-based prototype systems.

• Integrate, debug, and verify RTL designs in the FPGA environment.

• Collaborate with ASIC design, verification, and system teams to enable early hardware and software validation.

• Analyze prototype performance and resolve functional or timing issues.

• Support bring-up, testing, and deployment of FPGA prototype platforms

Qualifications

Minimum Qualifications

• Bachelor's or BS in Electrical Engineering, Computer Engineering, or a related field and 3+ years of experience, or a Master's degree with 2+ years of experience, or a PhD with 0 years of experience.

• Experience with FPGA synthesis tools such as Altera Quartus and AMD (Xilinx) Vivado and familiarity with FPGA as a prototyping platform.

• Expertise in troubleshooting and solving Static Timing Analysis (STA) issues in FPGA designs.

• Experience with hardware simulation tools and RTL design.

• Strong debugging skills to root cause and resolve design and verification issues.

Preferred Qualifications

• Familiarity with digital design fundamentals and hardware board design concepts.

• Familiarity with System Verilog for test bench creation and functional verification.

• Experience with Synplify Premier, Synopsys' FPGA synthesis tool

• Strong problem-solving skills and a disciplined, results-oriented approach to execution.

• Demonstrated experience in group problem solving and collaboration within cross-functional teams.

• Excellent communication skills to effectively articulate complex technical concepts and engage stakeholders.

We are looking for passionate, talented engineers ready to make an impact on Intel's leading-edge technologies. If this sounds like you, we encourage you to apply and join our team in shaping the future of computing.

Job Type

Experienced Hire

Shift

Shift 1 (Israel)

Primary Location:

Israel, Petah-Tikva

Additional Locations:

Israel, Haifa

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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