Senior Verification Engineer
Posted 13 days ago · 0 applicants
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The role in plain words
- B.Sc. in Electrical Engineering, Computer Engineering, Computer Science, or a related field
- 5+ years of Verification experience
- SystemVerilog
- UVM
Extracted from the job description · kept up to date automatically
Who this suits
Full job description
Original listing · kept for referenceHybrid | Ra'anana / Haifa / Tel Aviv
Join one of the world's leading global technology companies, developing the next generation of semiconductor and processor technologies.
We are looking for a Senior Verification Engineer with hands-on experience in SystemVerilog and UVM to join a top-tier Verification team- an exciting opportunity to work on the development and verification of critical blocks in a complex, cutting-edge system. You'll have a real impact on the architecture and product while collaborating with global engineering teams in an international environment.
✨ What we offer:
• Hybrid work model
• Excellent compensation and benefits
• Meaningful technical challenges with real product impact
• International, innovative, and collaborative environment
Requirements:
✔️ B.Sc. in Electrical Engineering, Computer Engineering, Computer Science, or a related field
✔️ 5+ years of Verification experience
✔️ Hands-on experience with SystemVerilog and UVM
Interested? We'd love to hear from you!
Questions about this role
- This listing did not state a salary. We only show pay when the employer publishes it.
- B.Sc. in Electrical Engineering, Computer Engineering, Computer Science, or a related field, 5+ years of Verification experience, SystemVerilog, UVM