Verification Engineer
Posted Jun 28 · 102 applicants
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The role in plain words
- 3+ years of hands-on experience in chip design verification
- Strong experience with SystemVerilog and UVM
- Proven experience in debugging complex RTL issues
- Strong analytical and problem-solving skills
- Ability to work independently and lead verification tasks end-to-end
Extracted from the job description · kept up to date automatically
Who this suits
Full job description
Original listing · kept for referenceWe are looking for an experienced and highly skilled Verification Engineer to join a fast-growing and exciting startup in the data-center domain.
You will play a key role in the verification of a complex, high-performance chip, working on challenging problems, influencing methodology, and helping drive quality and efficiency across the project.
Why Join Us?
• Work on cutting-edge silicon for data-center applications
• High technical bar with real ownership and impact
• Opportunity to influence verification architecture and methodology
• Collaborative, friendly, and innovation-driven culture
Required Experience
• 3+ years of hands-on experience in chip design verification
• Strong experience with SystemVerilog and UVM
• Proven experience in debugging complex RTL issues
• Experience with coverage (functional & code) – advantage
Required Skills
• Strong analytical and problem-solving skills
• Ability to work independently and lead verification tasks end-to-end
• Excellent debug and root-cause analysis capabilities
• Good communication skills and team collaboration
🎓 Education
• B.Sc. or M.Sc. in Electrical Engineering (BSEE / MSEE) from a leading university
Questions about this role
- This listing did not state a salary. We only show pay when the employer publishes it.
- 3+ years of hands-on experience in chip design verification, Strong experience with SystemVerilog and UVM, Proven experience in debugging complex RTL issues, Strong analytical and problem-solving skills, Ability to work independently and lead verification tasks end-to-end