Datapath team leader (arithmetic)

Company Description:

NeoLogic develops high-performance AI server CPUs powered by the company's proprietary CMOS+ technology. The company focuses on achieving superior power, performance, and area (PPA) compared with traditional CMOS-based processor designs across technology nodes. NeoLogic’s innovations enable more efficient, scalable compute for demanding AI and data-intensive workloads.

Role Description:

As a Datapath Team Leader, you will lead the design and development of arithmetic datapath blocks for advanced AI server CPU architectures. In this full-time role, you will guide a small engineering team in specifying, implementing, and optimizing arithmetic units such as adders, multipliers, dividers, MACs, etc. You will define micro-architecture, review RTL designs, coordinate verification activities, and collaborate closely with architecture, physical design, and performance analysis teams. Daily responsibilities include planning and tracking tasks, conducting design and code reviews, resolving technical issues, and mentoring team members. You will also contribute hands-on to critical datapath design work, ensuring the arithmetic pipeline meets stringent PPA, robustness, and scalability targets aligned with NeoLogic’s CMOS+ technology.

Qualifications

• Strong background in arithmetic datapath micro-architecture and design, including adders, multipliers, dividers, MAC units, and pipeline optimization.

• Proficiency in hardware description languages (e.g., Verilog or VHDL) and experience with synthesis, static timing analysis, and power/performance optimization flows.

• Knowledge of CPU or accelerator architecture concepts, including instruction pipelines, execution units, and vector/SIMD arithmetic for AI and HPC workloads.

• Experience collaborating with verification teams, understanding verification methodologies, and supporting testbench development and debug.

• Demonstrated leadership skills in guiding engineering teams: task planning, technical mentoring, and conducting structured design and code reviews.

• Familiarity with advanced process technologies and PPA trade-offs; experience with custom or semi-custom datapath implementation is an advantage.

• Strong analytical and problem-solving abilities, with attention to detail and a focus on quality, reliability, and scalability.

• Effective written and verbal communication skills and the ability to work remotely and collaborate across distributed teams.

• Master’s degree or PhD. in Electrical Engineering, Computer Engineering, or a related field; relevant industry experience in CPU, GPU, or accelerator design is highly beneficial.