STA Backend Engineer
Posted 26 days ago · 31 applicants
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The role in plain words
- STA analysis of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance
- Resolving complex timing and congestion problems
- Daily work involves all aspects of static timing analysis - constraints, environment, models generation and timing ECO generation for block level and full chip level
- Taking part in flows development
- B.SC. in Electrical Engineering/Computer Engineering
- Knowledge in physical design flows and methodologies (PNR, STA, physical verification)
- Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.)
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Who this suits
Full job description
Original listing · kept for referenceNVIDIA is looking for best-in-class STA Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What You Will Be Doing
• STA analysis of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.
• Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
• Daily work involves all aspects of static timing analysis - constraints, environment, models generation and timing ECO generation for block level and full chip level.
• Taking part inflows development.
What We Need To See
• B.SC. in Electrical Engineering/Computer Engineering.
• 2-3 years of experience as STA engineer.
• Ability to quickly adapt to new technology and go deep into new areas
• Strong communication skills
• Great teammate.
• Drive new solutions based on any issues that arise
Ways To Stand Out From The Crowd
• Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
• Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!
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Questions about this role
- This listing did not state a salary. We only show pay when the employer publishes it.
- STA analysis of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance, Resolving complex timing and congestion problems, Daily work involves all aspects of static timing analysis - constraints, environment, models generation and timing ECO generation for block level and full chip level, Taking part in flows development, B.SC. in Electrical Engineering/Computer Engineering