Chip Design Manager
Posted 27 days ago · 0 applicants
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The role in plain words
You will lead and grow a team of formal verification engineers focused on pre-silicon verification of complex digital designs. Your day-to-day responsibilities will include defining verification strategies across multiple projects, collaborating with architecture and design teams, and mentoring engineers to ensure high-quality, timely tapeouts.
- BSc or MSc in Electrical/Computer Engineering, Computer Science, or Mathematics
- 5+ years of managerial experience leading engineering teams in chip design or verification
- 8+ years of industry experience in RTL design, functional verification, or related domains
- Strong understanding of chip design flows and verification methodologies
- Excellent leadership, analytical, problem-solving, and communication skills
- Experience with formal verification tools and methodologies (e.g., JasperGold, VC Formal)
- Background in assertions, coverage models, or formal testbench development
- Track record of building and scaling high-performing engineering teams
- A passion for recruiting, mentoring, and developing talent
Extracted from the job description · kept up to date automatically
Who this suits
This role suits experienced engineering leaders with at least 5 years of managerial experience and 8 or more years of industry experience in RTL design or functional verification. It is less ideal for those without a strong background in chip design flows or formal verification methodologies.
Full job description
Original listing · kept for referenceWe are looking for a Chip Design Manager to join NVIDIA's Networking team! As a Chip Design Manager in NVIDIA's Networking Business Unit, you will lead a team of highly skilled engineers responsible for verifying the next generation of NVIDIA's cutting-edge network products and GPU technologies. This is a unique opportunity to make a real impact at the heart of NVIDIA's AI and HPC revolution, while working in a fast-paced, innovative environment. You will join a passionate, experienced team working at the forefront of silicon verification — using advanced methodologies and tools to ensure design correctness for world-class solutions in data centers, high-performance computing, networking, and storage.
What You'll Be Doing
• Lead and grow a team of formal verification engineers focused on pre-silicon FV of complex digital designs.
• Define and drive strategies and methodologies across multiple projects to prove design correctness and ensure quality.
• Collaborate closely with Architecture, Design, and DV teams to identify verification needs and drive closure.
• Provide technical guidance, mentoring, and support to engineers on the team.
• Own planning and execution of verification deliverables to ensure high quality and timely tapeouts.
What We Need To See
• BSc or MSc in Electrical/Computer Engineering, Computer Science, or Mathematics.
• 5+ years of managerial experience leading engineering teams in chip design or verification.
• 8+ years of industry experience in RTL design, functional verification, or related domains.
• Strong understanding of chip design flows and verification methodologies.
• Excellent leadership, analytical, problem-solving, and communication skills.
Ways To Stand Out From The Crowd
• Experience with formal verification tools and methodologies (e.g., JasperGold, VC Formal).
• Background in assertions, coverage models, or formal testbench development.
• Track record of building and scaling high-performing engineering teams.
• A passion for recruiting, mentoring, and developing talent.
At NVIDIA, we believe that our people are our greatest strength. Are you a creative and driven engineering leader who’s ready to take on the challenge of ensuring correctness in the most complex chips in the world? Join us and be a part of building the future of accelerated computing
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Questions about this role
- This listing did not state a salary. We only show pay when the employer publishes it.
- BSc or MSc in Electrical/Computer Engineering, Computer Science, or Mathematics, 5+ years of managerial experience leading engineering teams in chip design or verification, 8+ years of industry experience in RTL design, functional verification, or related domains, Strong understanding of chip design flows and verification methodologies, Excellent leadership, analytical, problem-solving, and communication skills