SOC Clock Distribution Engineer
Posted 14 days ago · 0 applicants
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The role in plain words
- B.Sc. in Electrical Engineering or Computer Engineering
- 3+ years of confirmed experience in chip design
- Hands-on physical design skills in clock distribution in tight multi-power and timing/layout constrained products
- Proficiency in at least one common scripting language like Perl, Python, Bash, or Tcl
- Experience with delivery back to RTL, to physical design, and other customers
Extracted from the job description · kept up to date automatically
Who this suits
Full job description
Original listing · kept for referenceJob Requisition ID
JR2019203
Job Category
Engineering
Time Type
Full time
Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The NVIDIA System-On-Chip (SOC) group is looking for a top physical design engineer with a curiosity about SOC design optimization, physical integration, chip build and assembly and verification. You should have real passion for methodologies and clock distribution solutions that enable SOC creation in the most optimized way. In this position, you will get the opportunity to build complex networking chips and directly contact unit-level owners, Physical Design, CAD, Package Design, Software, DFT and other teams.
What You'll Be Doing
• Designing and implementing SOC level clock requirements
• Daily work involves aspects of chip level design, including partitioning, CDC, trial synthesis, design quality checks
• Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, resolve design quality issues
What We Need To See
• B.SC. in Electrical Engineering/Computer Engineering.
• 3+ years of confirmed experience in chip design
• Shown hands on physical design skills in clock distribution in tight multi power and timing/layout constrained products.
• Proficiency in at least one common scripting languages like perl, python, bash, Tcl.
• Phenomenal teammate.
Ways To Stand Out From The Crowd
• Passion for quality. Experience with delivery back to RTL, to physical design, and other customers
At NVIDIA, you will be immersed in a diverse and encouraging environment where everyone is encouraged to do their best work. Join us and see how you can make a lasting impact on the world. Widely considered to be one of the technology world's most desirable employers, NVIDIA offers highly competitive salaries and comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status disability status or any other characteristic protected by law.
Questions about this role
- This listing did not state a salary. We only show pay when the employer publishes it.
- B.Sc. in Electrical Engineering or Computer Engineering, 3+ years of confirmed experience in chip design, Hands-on physical design skills in clock distribution in tight multi-power and timing/layout constrained products, Proficiency in at least one common scripting language like Perl, Python, Bash, or Tcl