Verification Engineer
פורסם לפני 8 ימים · 0 מועמדים
התפקיד במילים פשוטות
מהנדס/ת האימות (Verification Engineer) בצוות Annapurna Labs עוסק/ת באימות פרה-סיליקון של מעבדי AWS Graviton משלב הגדרת המוצר ועד לשילוב החומרה והתוכנה. התפקיד כולל עבודה עם מתודולוגיות מתקדמות כמו SV/UVM/TLM, כלי AI, ואימות פונקציונלי וביצועים לצד היבטי תכנון פיזי. התפקיד מחבר בין צוותי התוכנה, התכנון והסיליקון לאורך כל מחזור הפיתוח.
- Electrical/Computer Science engineering degree
- 5+ years of experience with RTL verification
- Knowledge of Hardware Verification concepts and tools (UVM, Coverage Driven verification)
- Sound understanding and knowledge of object-oriented programming concepts, Verilog/SystemVerilog/Specman
- Knowledge of programming languages: Perl/Bash/TCL/Python
- Knowledge of PCIe, Processors, Ethernet, DDR
חולץ מתיאור המשרה · מתעדכן אוטומטית
למי זה מתאים
התפקיד מתאים למהנדסי/ות חשמל או מדעי המחשב עם מעל 5 שנות ניסיון באימות RTL, והכרות מעמיקה עם מושגי אימות חומרה (UVM, אימות מבוסס כיסוי) ותכנות מונחה עצמים. התפקיד פחות מתאים לבעלי ניסיון מועט או ללא רקע ב-SystemVerilog/Verilog.
תיאור המשרה המלא
המשרה המקורית · נשמר לעיוןDescription
Annapurna Labs, is the team behind AWS Graviton- the industry's most advanced ARM-based server SoC.
We operate like a start-up with the scale of the world's largest cloud provider.
We're Looking For Exceptional Engineers To Join Our Pre-Silicon Verification Team - The Team That Sits At The Very Center Of The Chip Development Lifecycle. Verification At Annapurna Labs Isn't a Downstream Checkpoint - It's The Connective Tissue That Spans The Entire Product Journey
• It starts at product definition - we engage from day one, shaping requirements and translating product intent into verification strategies before a single line of RTL is written
• It extends into software - we work side-by-side with SW teams, verifying hardware-software interfaces and ensuring seamless integration across the stack
• It reaches into physical design - we verify physical design aspects within functional verification, bridging the gap between logical correctness and silicon reality
• It closes the loop - from spec to silicon, our verification touches every team and every stage of chip development
What Sets Us Apart
• Agentic AI is embedded in our workflow - not as an experiment, but as a core part of how we design and verify chips
• Cutting-edge methodologies drive every stage of our verification process
• Relentless innovation - we don't settle; we actively seek new approaches that raise the bar on silicon quality
• We do classic functional verification(SV/UVM/TLM), but beyond that, we touch physical design aspects, to ensure that the quality of our silicon is beyond logical functionality.
• Performance optimization at all levels it is at the heart of our targets on top of logical correctness verification.
If you want to be at the nerve center of chip development - where your work connects every discipline and powers the backbone of AWS Graviton - this is your team.
Basic Qualifications
• Electrical/Computer Science engineer
• 5+ years of experience with RTL verification
• Knowledge of Hardware Verification concepts and tools (UVM , Coverage Driven verification),
• Sound understanding and knowledge of object-oriented programming concepts, Verilog/SystemVerilog/Specman
Preferred Qualifications
• Knowledge of the following programming languages: Perl/Bash/TCl/Python/
• Knowledge of PCIe, Processors, Ethernet, DDR
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.
Company - Annapurna Labs Ltd.
Job ID: A10408690
שאלות על המשרה
- המשרה לא ציינה שכר. אנחנו מציגים שכר רק כשהמעסיק מפרסם אותו.
- Electrical/Computer Science engineering degree, 5+ years of experience with RTL verification, Knowledge of Hardware Verification concepts and tools (UVM, Coverage Driven verification), Sound understanding and knowledge of object-oriented programming concepts, Verilog/SystemVerilog/Specman