Design Vision Lead, Google Cloud
פורסם לפני 29 ימים · 0 מועמדים
התפקיד במילים פשוטות
בתפקיד זה, תהיה חלק מצוות המפתח פתרונות סיליקון מותאמים אישית עבור מוצרי גוגל. תתרום לחדשנות שמאחורי מוצרים המשמשים מיליוני אנשים ברחבי העולם, ותעצב את הדור הבא של חוויות חומרה. תכלול מעורבות טכנית לאורך כל מחזור פיתוח ה-IP, פיתוח RTL, ותשתף פעולה עם צוותים שונים כדי להבטיח עיצובים שלמים ונכונים.
- Bachelor's degree in Electrical Engineering or equivalent practical experience
- 15 years of experience with design from microarchitecture through implementation with Verilog/SystemVerilog language
- 10 years of experience in managing teams and groups
- Experience in microarchitecture, design, verification, logic synthesis, and timing closure
- Experience working with system design principles for low latency, high throughput, security, and reliability
- Master's degree or PhD in Engineering or equivalent practical experience
- Experience in micro-architecture and design of AI modules, optimizing their power, performance and area
- Experience in leading chip development projects and teams and execution
- Ability to motivate and focus on collaborative teams to achieve testing goals
חולץ מתיאור המשרה · מתעדכן אוטומטית
למי זה מתאים
התפקיד מתאים למהנדסים בעלי תואר ראשון בהנדסת חשמל או ניסיון מקביל, עם 15 שנות ניסיון בתכנון ממיקרו-ארכיטקטורה ועד יישום עם Verilog/SystemVerilog, ו-10 שנות ניסיון בניהול צוותים. נדרש ניסיון במיקרו-ארכיטקטורה, תכנון, אימות, סינתזה לוגית וסגירת תזמונים, וכן ניסיון בעקרונות תכנון מערכות עבור השהיה נמוכה, תפוקה גבוהה, אבטחה ואמינות.
תיאור המשרה המלא
המשרה המקורית · נשמר לעיוןNote: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.Minimum qualifications:
• Bachelor's degree in Electrical Engineering or equivalent practical experience.
• 15 years of experience with design from microarchitecture through implementation with Verilog/SystemVerilog language.
• 10 years of experience in managing teams and groups.
• Experience in microarchitecture, design, verification, logic synthesis, and timing closure.
• Experience working with system design principles for low latency, high throughput, security, and reliability.
• Experience with chip design flow, chip architecture, design methodologies, physical design, and verification processes.
Preferred qualifications:
• Master's degree or PhD in Engineering or equivalent practical experience.
• Experience in micro-architecture and design of AI modules, optimizing their power, performance and area.
• Experience in leading chip development projects and teams and execution.
• Ability to motivate and focus on collaborative teams to achieve testing goals.
About the jobBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next-generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next-generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
• Demonstrate technical involvement throughout the entire Intellectual Property (IP) development cycle, ensuring seamless integration into System-on-Chip (SoC).
• Perform RTL development (e.g., coding and debug in SystemVerilog), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
• Collaborate closely with software, verification, emulation, physical design, packaging, and silicon validation stakeholders to ensure that designs are complete, correct, and performant.
• Lead an edge AI IP design team across definition, implementation and deployment phases, while establishing IP development methodologies sharing unified blocks within the IP design team.
• Author block-level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .
שאלות על המשרה
- המשרה לא ציינה שכר. אנחנו מציגים שכר רק כשהמעסיק מפרסם אותו.
- Bachelor's degree in Electrical Engineering or equivalent practical experience, 15 years of experience with design from microarchitecture through implementation with Verilog/SystemVerilog language, 10 years of experience in managing teams and groups, Experience in microarchitecture, design, verification, logic synthesis, and timing closure, Experience working with system design principles for low latency, high throughput, security, and reliability