Senior Silicon Engineer
פורסם לפני 4 ימים · 0 מועמדים
התפקיד במילים פשוטות
תפקיד זה כולל הובלה ותכנון של ארכיטקטורה זעירה וקוד RTL עבור תת-מערכות סיליקון מורכבות המתמקדות באבטחה. העבודה כוללת שיתוף פעולה הדוק עם צוותי אימות, חומרה, תוכנה ועיצוב פיזי, לצד שילוב טכניקות מתקדמות כמו כלי AI לשיפור הפריון והאיכות. בנוסף, התפקיד כולל חניכה של מהנדסים אחרים והובלה טכנית בצוות.
- B.Sc. or higher in Electrical Engineering, Computer Engineering, or a related technical field
- Verilog/SystemVerilog
- RTL design for complex IPs, subsystems, or SoCs
- Microarchitecture definition and RTL implementation
- Pass Microsoft Cloud background check
- AI-assisted techniques for silicon design productivity, debug, or documentation
- Low-power design, clock/reset architecture, CDC/RDC, lint, synthesis, or timing closure
- Technical leadership or mentoring experience
חולץ מתיאור המשרה · מתעדכן אוטומטית
למי זה מתאים
התפקיד מתאים למהנדסי חשמל או מחשבים בעלי ניסיון מוכח בתכנון RTL ו-SystemVerilog עבור מערכות סיליקון מורכבות וכישורי הובלה טכנית. הוא פחות מתאים למי שחסר ניסיון פרקטי בפיתוח חומרה או למי שמעדיף שלא לעסוק בתחומי אבטחת חומרה והובלת עמיתים.
תיאור המשרה המלא
המשרה המקורית · נשמר לעיוןOverview
The WSSI (Windows Silicon System Integration) team is looking for a Senior Silicon Designer to help design complex silicon subsystems that are part of advanced solutions delivered in Windows client products.
This is an opportunity for an excellent silicon engineer to take meaningful technical ownership in a dynamic, agile, and highly collaborative environment. You will work on advanced subsystem design spanning microarchitecture, RTL implementation, integration, and design quality, with close collaboration across architecture, verification, firmware, system engineering, and physical design teams.
The role focuses on complex security-oriented silicon subsystems. We are looking for someone who combines strong design fundamentals with curiosity, ownership, and the motivation to learn and apply modern techniques - including AI-assisted workflows - to improve silicon development productivity and quality.
Responsibilities
• Own and drive microarchitecture and RTL design for complex silicon blocks and subsystems, translating architecture and system requirements into clean, efficient, and high-quality hardware implementations.
• Collaborate closely with verification, firmware, system engineering, architecture, and physical design partners to define interfaces, debug complex issues, manage technical risks, and deliver robust silicon solutions.
• Contribute to subsystem integration, design reviews, quality checks, synthesis readiness, timing considerations, and design handoff flows.
• Explore and apply modern silicon development workflows, including AI-assisted techniques for design productivity, debug, documentation, and quality improvements.
• Act as a technical leader within the team by mentoring others, raising the engineering bar, and helping drive execution in a fast-moving environment.
Qualifications
• B.Sc. or higher in Electrical Engineering, Computer Engineering, or a related technical field.
• Proven experience and technical excellence in RTL design for complex IPs, subsystems, or SoCs.
• Proven hands-on experience with Verilog/SystemVerilog, microarchitecture definition, RTL implementation, design reviews, and design quality practices.
Preferred Qualifications
• Experience applying AI-assisted techniques to improve silicon design productivity, debug, documentation, automation, or workflow efficiency.
• Experience with security-oriented silicon subsystems, including crypto engines, memory protection, secure boot, trusted execution, or related hardware security domains.
• Experience working across key parts of the silicon development lifecycle, including verification collaboration, integration, synthesis readiness, timing considerations, and design closure.
• Experience with low-power design, performance optimization, clock/reset architecture, CDC/RDC, lint, synthesis, or timing closure.
• Experience acting as a technical leader, design owner, or mentor for other engineers.
• Strong problem-solving skills, ownership mindset, and ability to drive technical work independently while collaborating effectively across disciplines.
• High motivation, curiosity, and willingness to learn new domains, tools, and methodologies.
Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter.
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This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.
שאלות על המשרה
- המשרה לא ציינה שכר. אנחנו מציגים שכר רק כשהמעסיק מפרסם אותו.
- B.Sc. or higher in Electrical Engineering, Computer Engineering, or a related technical field, Verilog/SystemVerilog, RTL design for complex IPs, subsystems, or SoCs, Microarchitecture definition and RTL implementation, Pass Microsoft Cloud background check